Stub Series Terminated Logic
id:
stub-series-terminated-logic-254-14545148
title:
Stub Series Terminated Logic
text:
Stub Series Terminated Logic (SSTL) is a group of electrical standards for driving transmission lines commonly used with DRAM based DDR memory IC's and memory modules. SSTL is primarily designed for driving the DDR (double-data-rate) SDRAM modules used in computer memory; however, it is also used in other applications, notably some PCI Express PHYs and other high-speed devices. Four voltage levels for SSTL are defined: SSTL_3, 3.3 V, defined in EIA/JESD8-8 1996
SSTL_2, 2.5 V, defined in EIA/JESD
brand slug:
wiki
category slug:
encyclopedia
description:
original url:
https://en.wikipedia.org/wiki/Stub_Series_Terminated_Logic
date created:
date modified:
2022-02-25T07:15:56Z
main entity:
{"identifier":"Q7627297","url":"https://www.wikidata.org/entity/Q7627297"}
image:
fields total:
13
integrity:
13