Wishbone (computer bus)
id:
wishbone-computer-bus-304-17502950
title:
Wishbone (computer bus)
text:
The Wishbone Bus is an open source hardware computer bus intended to let the parts of an integrated circuit communicate with each other. The aim is to allow the connection of differing cores to each other inside of a chip. The Wishbone Bus is used by many designs in the OpenCores project. Wishbone is intended as a "logic bus". It does not specify electrical information or the bus topology. Instead, the specification is written in terms of "signals", clock cycles, and high and low levels. This am
brand slug:
wiki
category slug:
encyclopedia
description:
original url:
https://en.wikipedia.org/wiki/Wishbone_(computer_bus)
date created:
date modified:
2022-04-08T22:05:14Z
main entity:
{"identifier":"Q3569455","url":"https://www.wikidata.org/entity/Q3569455"}
image:
{"content_url":"https://upload.wikimedia.org/wikipedia/commons/7/71/Wishbone_Interface.svg","width":343,"height":325}
fields total:
13
integrity:
14