VerilogCSP
id:
verilogcsp-319-15174111
title:
VerilogCSP
text:
In integrated circuit design, VerilogCSP is a set of macros added to Verilog HDL to support Communicating Sequential Processes (CSP) channel communications. These macros are intended to be used in designing digital asynchronous circuits. VerilogCSP also describes nonlinear pipelines and high-level channel timing properties, such as forward and backward latencies, minimum cycle time, and slack.
brand slug:
wiki
category slug:
encyclopedia
description:
original url:
https://en.wikipedia.org/wiki/VerilogCSP
date created:
date modified:
2022-11-22T05:54:24Z
main entity:
{"identifier":"Q7921340","url":"https://www.wikidata.org/entity/Q7921340"}
image:
fields total:
13
integrity:
13