Shallow trench isolation
id:
shallow-trench-isolation-322-6340013
title:
Shallow trench isolation
text:
Shallow trench isolation (STI), also known as box isolation technique, is an integrated circuit feature which prevents electric current leakage between adjacent semiconductor device components. STI is generally used on CMOS process technology nodes of 250 nanometers and smaller. Older CMOS technologies and non-MOS technologies commonly use isolation based on LOCOS. STI is created early during the semiconductor device fabrication process, before transistors are formed. The key steps of the STI pr
brand slug:
wiki
category slug:
encyclopedia
description:
Integrated circuit
original url:
https://en.wikipedia.org/wiki/Shallow_trench_isolation
date created:
date modified:
2021-08-24T23:15:36Z
main entity:
{"identifier":"Q1424524","url":"https://www.wikidata.org/entity/Q1424524"}
image:
{"content_url":"https://upload.wikimedia.org/wikipedia/en/0/0a/Isolation_pitch_vs_design_rule.PNG","width":618,"height":400}
fields total:
13
integrity:
15