RISC-V
id:
risc-v-189-15276606
title:
RISC-V
text:
RISC-V is an open standard instruction set architecture (ISA) based on established reduced instruction set computer (RISC) principles. The project began in 2010 at the University of California, Berkeley, transferred to the RISC-V Foundation in 2015, and on to RISC-V International, a Swiss non-profit entity, in November 2019. Like several other RISC ISAs, e.g. Amber (ARMv2) or OpenRISC, RISC-V is offered under royalty-free open-source licenses. The documents defining the RISC-V instruction set ar
brand slug:
wiki
category slug:
encyclopedia
description:
Open-source CPU hardware instruction set architecture
original url:
https://en.wikipedia.org/wiki/RISC-V
date created:
2014-08-25T10:50:56Z
date modified:
2024-09-09T17:05:25Z
main entity:
{"identifier":"Q17637401","url":"https://www.wikidata.org/entity/Q17637401"}
image:
fields total:
13
integrity:
15