Reference Verification Methodology
id:
reference-verification-methodology-243-16942115
title:
Reference Verification Methodology
text:
The Reference Verification Methodology (RVM) is a complete set of metrics and methods for performing Functional verification of complex designs such as for Application-specific integrated circuits or other semiconductor devices. It was published by Synopsys in 2003. RVM is implemented under OpenVera. The SystemVerilog implementation of the RVM is known as the VMM. It contains a small library of base classes.
brand slug:
wiki
category slug:
encyclopedia
description:
original url:
https://en.wikipedia.org/wiki/Reference_Verification_Methodology
date created:
date modified:
2019-03-13T16:15:11Z
main entity:
{"identifier":"Q7307109","url":"https://www.wikidata.org/entity/Q7307109"}
image:
fields total:
13
integrity:
13