Memory-level parallelism
id:
memory-level-parallelism-245-1578975
title:
Memory-level parallelism
text:
In computer architecture, memory-level parallelism (MLP) is the ability to have pending multiple memory operations, in particular cache misses or translation lookaside buffer (TLB) misses, at the same time. In a single processor, MLP may be considered a form of instruction-level parallelism (ILP). However, ILP is often conflated with superscalar, the ability to execute more than one instruction at the same time, e.g. a processor such as the Intel Pentium Pro is five-way superscalar, with the abi
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wiki
category slug:
encyclopedia
description:
original url:
https://en.wikipedia.org/wiki/Memory-level_parallelism
date created:
date modified:
2023-07-02T16:56:35Z
main entity:
{"identifier":"Q6815651","url":"https://www.wikidata.org/entity/Q6815651"}
image:
fields total:
13
integrity:
13