M·CORE
id:
m-core-263-7949767
title:
M·CORE
text:
M·CORE is a low-power, RISC-based microcontroller architecture developed by Motorola, intended for use in embedded systems. Introduced in late 1997, the architecture combines a 32-bit internal data path with 16-bit instructions, and includes a four-stage instruction pipeline. Initial implementations used a 360nm process and ran at 50 MHz. M·CORE processors employ a von Neumann architecture with shared program and data bus—executing instructions from within data memory is possible. Motorola engin
brand slug:
wiki
category slug:
encyclopedia
description:
original url:
https://en.wikipedia.org/wiki/M%C2%B7CORE
date created:
date modified:
2023-03-02T14:21:31Z
main entity:
{"identifier":"Q6949512","url":"https://www.wikidata.org/entity/Q6949512"}
image:
fields total:
13
integrity:
13