Hitachi SR2201
id:
hitachi-sr2201-295-5733530
title:
Hitachi SR2201
text:
The Hitachi SR2201 was a distributed memory parallel system that was introduced in March 1996 by Hitachi. Its processor, the 150 MHz HARP-1E based on the PA-RISC 1.1 architecture, solved the cache miss penalty by pseudo vector processing (PVP). In PVP, data was loaded by prefetching to a special register bank, bypassing the cache. Each processor had a peak performance of 300 MFLOPS, giving the SR2201 a peak performance of 600 GFLOPS. Up to 2048 RISC processors could be connected via a high-speed
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wiki
category slug:
encyclopedia
description:
original url:
https://en.wikipedia.org/wiki/Hitachi_SR2201
date created:
date modified:
2023-09-07T16:07:26Z
main entity:
{"identifier":"Q5871675","url":"https://www.wikidata.org/entity/Q5871675"}
image:
fields total:
13
integrity:
13