High-speed transceiver logic
id:
high-speed-transceiver-logic-322-3269802
title:
High-speed transceiver logic
text:
High-speed transceiver logic or HSTL is a technology-independent standard for signaling between integrated circuits. The nominal signaling range is 0 V to 1.5 V, though variations are allowed, and signals may be single-ended or differential. It is designed for operation beyond 180 MHz. The following classes are defined by standard EIA/JESD8-6 from EIA/JEDEC: Class I
Class II
Class III
Class IV Note that Symmetric parallel termination means that the termination resistor at the load is connected t
brand slug:
wiki
category slug:
encyclopedia
description:
original url:
https://en.wikipedia.org/wiki/High-speed_transceiver_logic
date created:
date modified:
2018-03-09T07:47:57Z
main entity:
{"identifier":"Q5754733","url":"https://www.wikidata.org/entity/Q5754733"}
image:
fields total:
13
integrity:
13