Formal equivalence checking
id:
formal-equivalence-checking-250-16402626
title:
Formal equivalence checking
text:
Formal equivalence checking process is a part of electronic design automation (EDA), commonly used during the development of digital integrated circuits, to formally prove that two representations of a circuit design exhibit exactly the same behavior.
brand slug:
wiki
category slug:
encyclopedia
description:
Stage of electronic circuit design verification
original url:
https://en.wikipedia.org/wiki/Formal_equivalence_checking
date created:
date modified:
2024-04-25T22:00:26Z
main entity:
{"identifier":"Q5469962","url":"https://www.wikidata.org/entity/Q5469962"}
image:
fields total:
13
integrity:
14