Depletion-load NMOS logic
id:
depletion-load-nmos-logic-186-5476162
title:
Depletion-load NMOS logic
text:
In integrated circuits, depletion-load NMOS is a form of digital logic family that uses only a single power supply voltage, unlike earlier NMOS logic families that needed more than one different power supply voltage. Although manufacturing these integrated circuits required additional processing steps, improved switching speed and the elimination of the extra power supply made this logic family the preferred choice for many microprocessors and other logic elements. Depletion-mode n-type MOSFETs
brand slug:
wiki
category slug:
encyclopedia
description:
Form of digital logic family in integrated circuits
original url:
https://en.wikipedia.org/wiki/Depletion-load_NMOS_logic
date created:
2005-10-07T16:27:03Z
date modified:
2024-09-08T12:21:24Z
main entity:
{"identifier":"Q117274247","url":"https://www.wikidata.org/entity/Q117274247"}
image:
{"content_url":"https://upload.wikimedia.org/wikipedia/commons/c/c4/Nmos_depletion_and.svg","width":200,"height":275}
fields total:
13
integrity:
16