Cray T3D
id:
cray-t3d-257-3063944
title:
Cray T3D
text:
The T3D was Cray Research's first attempt at a massively parallel supercomputer architecture. Launched in 1993, it also marked Cray's first use of another company's microprocessor. The T3D consisted of between 32 and 2048 Processing Elements (PEs), each comprising a 150 MHz DEC Alpha 21064 (EV4) microprocessor and either 16 or 64 MB of DRAM. PEs were grouped in pairs, or nodes, which incorporated a 6-way processor interconnect switch. These switches had a peak bandwidth of 300 MB/second in each
brand slug:
wiki
category slug:
encyclopedia
description:
original url:
https://en.wikipedia.org/wiki/Cray_T3D
date created:
date modified:
2024-02-12T15:43:28Z
main entity:
{"identifier":"Q637619","url":"https://www.wikidata.org/entity/Q637619"}
image:
fields total:
13
integrity:
13