Bus functional model
id:
bus-functional-model-261-6633712
title:
Bus functional model
text:
A Bus Functional Model is a non-synthesizable software model of an integrated circuit component having one or more external buses. The emphasis of the model is on simulating system bus transactions prior to building and testing the actual hardware. BFMs are usually defined as tasks in Hardware description languages (HDLs), which apply stimuli to the design under verification via complex waveforms and protocols. A BFM is typically implemented using hardware description languages such as Verilog,
brand slug:
wiki
category slug:
encyclopedia
description:
original url:
https://en.wikipedia.org/wiki/Bus_functional_model
date created:
date modified:
2023-12-17T01:24:32Z
main entity:
{"identifier":"Q5001179","url":"https://www.wikidata.org/entity/Q5001179"}
image:
fields total:
13
integrity:
13