Back-side bus
id:
back-side-bus-275-13726777
title:
Back-side bus
text:
In personal computer microprocessor architecture, a back-side bus (BSB), or backside bus, was a computer bus used on early Intel platforms to connect the CPU to CPU cache memory, usually off-die L2. If a design utilizes a back-side bus along with a front-side bus (FSB), the design is said to use a dual-bus architecture, or in Intel's terminology Dual Independent Bus (DIB) architecture. The back-side bus architecture evolved when newer processors like the second-generation Pentium III began to in
brand slug:
wiki
category slug:
encyclopedia
description:
Computer architecture terminology
original url:
https://en.wikipedia.org/wiki/Back-side_bus
date created:
date modified:
2023-12-03T15:33:49Z
main entity:
{"identifier":"Q742323","url":"https://www.wikidata.org/entity/Q742323"}
image:
{"content_url":"https://upload.wikimedia.org/wikipedia/commons/8/85/Intel_MMC2_arch.svg","width":744,"height":905}
fields total:
13
integrity:
15